Most current HPC systems are heterogeneous and use accelerators. oneAPI is a standardized and portable programming model adapted to heterogeneous computing. In this course we will provide an introduction to Intel's oneAPI implementation, which supports two portable methods of heterogeneous computing: Data Parallel C++ (DPC) with SYCL and OpenMP for C, C++, and Fortran. Both are portable on any Intel CPU and Intel based accelerator, but also other GPUs. The course will give an introduction in these two programming methods, Intel's libraries like oneMKL and tools for performance analysis, profiling, and debugging. Further an introduction to Intel's DPC compatibility Tool to facilitate code migration from CUDA to SYCL and to Intel's MPI implementation support with GPU awareness completes the program.
Online course Organizer: HLRS, University of Stuttgart, Germany
Sep 23, 2024 08:45
Sep 25, 2024 12:40
Online
English
Basic
Parallel Programming
Hardware Accelerators
Code Optimization
GPU Programming
MPI
OpenMP
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Good knowlegde any of C/C++/Fortran and familiarity with usual OpenMP programming is sufficient for the OpenMP part. For Data Parallel C++/SYCL knowlegde of C++11 or later is recommended (C++17 very much faciliates SYCL2020 programming).
Learn more about course curricula and content levels.
Intel staff.
After this course, participants will:
The preliminary agenda is as follows. All times are CEST.
09:10
09:20
10:10
Direct programming with oneAPI Compilers (Part 1) – with Demos - Intro to heterogeneous programming model with SYCL 2020 - SYCL features and examples o “Hello World” Example o Device Selection o Execution Model
10:25
Break
11:15
Direct programming with oneAPI Compilers (Part 2) – with Demos o Compilation and Execution Flow o Memory Model; Buffers, Unified Shared Memory (USM) o Performance optimizations with SYCL features
11:30
12:30
oneAPI Case Study – GROMACS
12:40
Day 2
9:00
9:05
09:05
09:55
10:00
10:35
Intel Debugging Tools for heterogeneous programming (CPU, GPU) - with demos
Day 3
10:05
10:15
11:25
11:35
12:10
During the lectures in the morning only demonstrations will be shown. However, we will also show how to access Intel's DevCloud where participants can explore and work on the examples given themselves in the afternoon. Additionally, Intel will offer support to a limited number of participants.
Register via the button at the top of this page. We encourage you to register to the waiting list if the course is full. Places might become available.
Please be aware that the talks and Q'n'A sessions will be recorded. You declare that you are aware of and consent to the recording by registering.
Registration closes on September 8, 2024 (extended registration phase).
Late registrations after that date are still possible according to the course capacity.
This course is free of charge.
Our course fee includes coffee breaks (in classroom courses only).
Tobias Haas phone 0711 685 87223, training(at)hlrs.de
HLRS is part of the Gauss Centre for Supercomputing (GCS), together with JSC in Jülich and LRZ in Garching near Munich. EuroCC@GCS is the German National Competence Centre (NCC) for High-Performance Computing. HLRS is also a member of the Baden-Württemberg initiative bwHPC.
See the training overview and the Supercomputing Academy pages.
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